Summary

The Texas Instruments ADC12QJ1600-SP is a quad-channel, 12-bit, 1.6 GSPS analog-to-digital converter (ADC).

It has a low power consumption, high sampling rate, and 12-bit resolution, making it well-suited for a variety of multi-channel communications systems.

A number of clocking features are included to relax system hardware requirements, such as an internal phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) to generate the sampling clock. Four clock outputs are provided to clock the logic and SerDes of the FPGA or ASIC. A timestamp input and output are provided for pulsed systems.

Applications

  • Electronic warfare (SIGINT, ELINT)
  • Satellite communications (SATCOM)

Key features

  • ADC Core:
    - Resolution: 12 Bit
    - Maximum sampling rate: 1.6 GSPS
    - Non-interleaved architecture
    - Internal dither reduces high-order harmonics
  • JESD204C Serial data interface:
    - Support for 2 to 8 total SerDes lanes
    - Maximum baud-rate: 17.16 Gbps
    - 64B/66B and 8B/10B encoding modes
    - Subclass-1 support for deterministic latency
    - Compatible with JESD204B receivers
  • Optional internal sampling clock generation: Internal PLL and VCO (7.2–8.2 GHz)
  • SYSREF Windowing eases synchronization
  • Four clock outputs simplify system clocking:
    - Reference clocks for FPGA or adjacent ADC
    - Reference clock for SerDes transceivers
  • Timestamp input and output for pulsed systems

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Last updated: 2023-06-29

ADC12QJ1600-SP - Radiation-hardness-assured (RHA), 300-krad, 12-bit, quad-channel, 1.6-GSPS ADC

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